Added Timeouts (untested)
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5da22fff03
commit
ba28f387ef
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@ -4,8 +4,8 @@ ISPPORT ?= /dev/kaboard
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VERSION = 0.1
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HEADERS = sss7.h uart.h
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SRC = main.c sss7.c uart.c
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HEADERS = sss7.h uart.h timer.h
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SRC = main.c sss7.c uart.c timer.c
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TARGET = sss7
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OBJDIR = bin
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@ -18,6 +18,8 @@ volatile uint8_t sss7_tx_failed;
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uint8_t sss7_tx_last_byte;
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uint8_t sss7_tx_last_ack;
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volatile uint8_t sss7_timeout_counter;
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void sss7_init(void) {
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sss7_state = SSS7_IDLE;
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@ -29,9 +31,6 @@ void sss7_init(void) {
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sss7_tx_pos = 0;
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sss7_tx_crc = 0;
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sss7_tx_failed = 0;
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DDRB |= (1 << PB2)| (1 << PB3);
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PORTB |= (1 << PB2) | (1 << PB3);
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}
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@ -50,7 +49,7 @@ static inline uint8_t sss7_payload_crc(uint8_t buffer[SSS7_PAYLOAD_SIZE]) {
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}
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}
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}
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return crc;
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}
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@ -77,6 +76,7 @@ void sss7_send(uint8_t msg[SSS7_PAYLOAD_SIZE]) {
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// Commit to send state
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sss7_state = SSS7_TX_HEADER;
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sss7_tx_failed = 0;
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sss7_timeout_counter = 0;
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sss7_send_byte(SSS7_HEADER[0]);
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}
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@ -84,12 +84,12 @@ void sss7_send(uint8_t msg[SSS7_PAYLOAD_SIZE]) {
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void sss7_process_rx(void) {
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uint8_t byte = uart_get_byte();
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uint8_t crc = 0;
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sss7_timeout_counter = 0;
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switch(sss7_state) {
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case SSS7_IDLE:
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if(byte == SSS7_HEADER[0]) {
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sss7_state = SSS7_RX_HEADER;
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PORTB |= (1 << PB3);
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}
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else {
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sss7_state = SSS7_IDLE;
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@ -119,7 +119,6 @@ void sss7_process_rx(void) {
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if(byte == crc) {
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sss7_rx_active_buffer = (sss7_rx_active_buffer + 1) % SSS7_RX_BUFFER_COUNT;
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}
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PORTB &= ~(1 << PB3);
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sss7_state = SSS7_IDLE;
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break;
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@ -172,6 +171,23 @@ void sss7_process_tx(void) {
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}
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}
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void sss7_process_ticks(uint16_t ticks) {
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if(sss7_state != SSS7_IDLE) {
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sss7_timeout_counter = sss7_timeout_counter + ticks;
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if(sss7_timeout_counter > sss7_timeout) {
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switch(sss7_state) {
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case SSS7_TX_HEADER:
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case SSS7_TX_PAYLOAD:
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case SSS7_TX_CRC:
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sss7_tx_failed = 1;
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default:
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sss7_state = SSS7_IDLE;
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}
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}
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}
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}
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void sss7_get_received(uint8_t msg[SSS7_PAYLOAD_SIZE]) {
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if(sss7_has_received()) {
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@ -15,10 +15,13 @@ enum sss7State {
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};
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const static uint8_t SSS7_HEADER[] = {0xAA, 0xFE};
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const static uint16_t sss7_timeout = 50;
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const static uint16_t sss7_timeout_increment = 1;
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#define SSS7_PAYLOAD_SIZE 16
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#define SSS7_RX_BUFFER_COUNT 2
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extern volatile enum sss7State sss7_state;
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extern volatile uint8_t sss7_tx_failed;
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extern uint8_t sss7_rx_active_buffer;
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@ -26,6 +29,7 @@ extern uint8_t sss7_rx_oldest_buffer;
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void sss7_process_rx(void);
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void sss7_process_tx(void);
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void sss7_process_ticks(uint16_t ticks);
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void sss7_init(void);
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@ -0,0 +1,28 @@
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#include "timer.h"
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include "sss7.h"
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/*
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* Timer setting:
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* MCU running at 16MHz:
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* Prescaler is 64 which results in 250000 ticks per second
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* Preloading the counter with 6 leads to 1000 overflow interrupts per second
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* or one overflow every millisecond.
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*/
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void timer_init(void) {
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TCNT0 = 6; //Preload for 250 ticks to overflow
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TIMSK |= (1 << TOIE0);
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TCCR0 = (1 << CS00) | (1 << CS01); // Prescaler 64
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}
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ISR(TIMER0_OVF_vect) {
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TCNT0 = 6; //Preload for 250 ticks to overflow
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sss7_process_ticks(sss7_timeout_increment);
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}
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@ -0,0 +1,7 @@
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#ifndef _TIMER_H_
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#define _TIMER_H_
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void timer_init(void);
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#endif
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